The invention relates to sample-and-hold devices using complementary bipolar technology.
Sample-and-hold devices are used in many fields of electronics and especially in analog-digital converters and in analog signal processing systems.
The main function of a sample-and-hold device is to copy, starting from a given point in time t0 and for a very short period of time .DELTA.t, the level of a voltage Vin applied to an input of the sample-and-hold devices and to store it for a time that is long enough to perform a specified processing of this level at t0. The period of time .DELTA.t is understood to be very short as compared with the relative variations of the input voltage Vin.
The sample-and-hold device may take two different states corresponding to two different modes of operation.
In a first state, the sample-and-hold device is in "follower" mode and an output of the sample-and-hold device reproduces a faithful image of the input voltage Vin applied to its input.
In the second state, the sample-and-hold device is in the "held" mode and its output is isolated from its input.
A certain number of criteria of quality of the sample-and-hold device have been defined, certain criteria being related to one mode of operation or to the other.
For example, these criteria of quality include the following in follower mode:
the maximum level (full scale) of the voltage Vin that can be processed by the sample-and-hold device in relation to the supply voltage that is applied to it. Indeed, an increase in the level of the voltage Vin that can be processed leads to an improvement of the signal-to-noise ratio at output of the sample-and-hold device and to greater flexibility of use; PA1 consumption: the dynamic performance characteristics are chiefly related to the currents biasing the different arms of the sample-and-hold device. Since the voltage is dictated (by the user), the designer seeks to minimize the current in order to reduce consumption; PA1 linearity: in follower mode, it is important that the output voltage of the sample-and-hold device should faithfully reflect the input voltage Vin, and should do so along the full scale of voltage, namely from the maximum level to the minimum level of the voltage Vin; PA1 the passband: expresses the ability of the sampler to follow a fast signal, and therefore to be used in applications that make heavy demands; PA1 noise: when sampling is done, in addition to the signal Vin, the inherent noise of the sampler is held. If the noise has a spectrum that spreads beyond the spectrum of the signal, then the holding operation brings it to the baseband. This is spectral aliasing. It is therefore indispensable to limit the noise band when it is not indispensable; PA1 harmonic distortion: this may be created by poor linearity as well as by reactive phenomena. In particular, the dynamic current flowing into the sampling capacitor is a cause of dynamic non-linearity and hence of distortion. PA1 input/output isolation; PA1 drift: in general, the voltage sampled at the instant t0 is stored by means of a sampling capacitor. The voltage signal held by the sampling capacitor is liable to drift in time because of the presence of leakage currents and of the current consumed by the reading device of this capacitor. This drift should be low, independent of the level of the signal and compatible with the sampling period and a full scale of the signal; PA1 releasing/holding speed: the speed of switching over from one state to another is a major parameter with regard to the use of the circuit in frequency. This requires the sample-and-hold device to receive a signal of maximum width from a clock controlling the change in state, the result of which is that what is actually made is a follow-and-hold device, and not a sample-and-hold device that is ideally controlled by a Dirac pulse. PA1 a follower input stage having one input receiving a voltage Vin to be sampled and at least one output, PA1 at least one sampling circuit having a switching stage, the switching stage having at least one control input, one signal input connected to the output of the follower input stage, and one output. The switching stage is controlled by its control input by a digital command so that it is placed either in a first state called a "follower" state where its output follows the potential at its signal input or in a second state called an "isolated" state where its output is isolated from it signal input. The output of the switching stage is connected to the base of a first follower transistor whose emitter is connected to a terminal of an output sampling capacitor. The sampling circuit furthermore comprises a second transistor, having its emitter supplied by a current source and having its base connected to a potential copying that of the terminal of the output sampling capacitor, and a third transistor controlled by the digital command so as to be crossed by a current when the switching stage is in the &lt;&lt;isolated state&gt;&gt;, and so as to be off when the switching stage is in the &lt;&lt;follower&gt;&gt; state, the third transistor having its emitter connected to the base of the first transistor and its base connected to the emitter of the second transistor. PA1 with Vbe&gt;0 PA1 before holding: EQU Qst=Ic(Q1)*Tf, PA1 Ic(Q1): dynamic collector current Q1 PA1 after holding: Qst is zero because there is no longer any current EQU Ic(Q1)=Ipolar+C.dVin/dt PA1 k, being the Boltzmann's constant, PA1 T, being the absolute temperature, and PA1 q, the charge of the electron. PA1 I: current in the transistor PA1 Is: reverse saturation current PA1 In: natural logarithm. PA1 Isp: reverse saturation current of the PNP transistors PA1 Isn: reverse saturation current of the NPN transistors PA1 I4, I5, I6, I7 currents in the transistors Q4, Q5, Q6, Q7 PA1 greatly reduce the idle current, leading to a drop in the consumption of the circuit, PA1 reduce the noise on the sampled signal, PA1 limit the inductive effect of the emitter (prevent transient local oscillations). PA1 the levels given at the base of the followers driving the output sampling capacitor are created by followers driving the additional sampling capacitor.
More particularly, in held mode, we may refer to:
An important characteristic of sample-and-hold devices is related to the precision with which the input voltage Vin is copied at the time of the holding.
Indeed, the input voltage Vin may be applied to the sampling capacitor through the emitter of a bipolar follower transistor. When the transistor is made non-conductive at the point in time t0, holding the voltage Vin at the terminals of the capacitor, the charge Qst stored in the transistor gets discharged partly by the base and partly by the emitter.
The charge stored by a bipolar transistor that is crossed by a collector current Ic with a transition time Tf characteristic of the technology is given by Qst=Ic.Tf. When the transistor is turned off, Ic becomes zero and the charge removed by the emitter is at the sampling capacitor after the turning off, giving rise to a voltage pedestal Vin.